Programmable Logic DesignLine
09-10-2009, 07:01 AM
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Programmable Logic DesignLine Newsletter
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The Programmable Logic DesignLine Newsletter is delivered to you free
of charge from the staff of Programmable Logic DesignLine.
To view the Programmable Logic DesignLine visit:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0DT6t0En
09-10-2009
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This issue sponsored by: Maxim
Maxim Secures Your FPGA Design with a Single Pin 1-Wire(r)
secure memories utilize a simple yet robust and easy to use
challenge-and-response authentication sequence that protects
the design investment from copying and cloning. Learn how
1-Wire can protect your investment:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRy0EO
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
EDITOR'S NOTE
Our how to design article this week tackles the problem of limited I/O
ports availability for a microcontroller. As with so many applications
today, FPGAs can be the solution. This article from Actel describes
how to deploy an 8051-based FPGA as an 8-bit MCU.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRl0EB
I'd also like to call special attention to my blog item this week. It
concerns the EE Times virtual conference on designing
next-generation SoCs. This is an event that I am certain many readers
will want to attend.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRm0EC
But wait, there's more! Read now and you can also take a look at all
of the best products and biggest news for the week. It's all here, all
free, and all delivered right to your inbox each week. How can you top
that?
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0FDtF0Ep
Questions, Ideas, Comments, Complaints? Email me, Dylan McGrath, at
dmcgrath (AT) techinsights (DOT) com.
FEATURED HOW-TO ARTICLE
--Control issues: How FPGAs can address MCUs' general-purpose I/O
scaling wall--
The general-purpose inputs and outputs ports available for a
microcontroller are usually limited in number. FPGAs can be deployed
to overcome this barrier by adding four 8-bit ports to any 8-bit
microcontroller. This article describes how to deploy an 8051-based
FPGA as an 8-bit microcontroller.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRn0ED
RECENT HOW-TO ARTICLES OF INTEREST
--Building high-speed FPGA memory interfaces--
This article examines the architecture behind the I/O blocks in
high-end FPGAs and how these FPGAs are able to achieve 533 MHz or 1067
Mbps data rates. It also examines the tools that are used to build a
memory interface, and provide a brief overview of the timing budget.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQyc0Ee
--Debugging hardware designs with an FPGA-based emulation tool--
Ludovic Larzul of EVE describes how embedded systems developers can
lower the cost of hardware debugging on their ASIC, FPGA and SoC
designs through the use of an FPGA-based emulation tool.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQY40EL
--Back to the basics: Doing Hardware Counter/Timer design using High
School Science-- Using the same unit-conversion techniques and
dimensional analysis techniques learned in high school, Zane Purvis
takes non-engineers and newcomers to embedded design step-by-step
through the configuration of a counter/timer.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQY70EO
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
TOP PRODUCTS
--Mentor offers IP platform for FPGA designs --
Mentor Graphics has brought out Precise-IP platform as part of its
Precision Synthesis product line. The platform includes
vendor-independent configurable IP from Mentor Graphics and links to
categorized third-party IP from leading vendors.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRo0EE
--Lattice rolls reference designs, dev kits --
Lattice Semiconductor this week announced the immediate availability
of eight new reference designs, a $49 development kit for the
ProcessorPM POWR605 power manager device and a $69 development kit for
the ispMACH 4000ZE CPLD.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRp0EF
--PMC/XMC transceiver module suited for wideband radar
countermeasures, MIL/COTS applications --
Pentek introduced a new data converter with two on-board Virtex-5
FPGAs from Xilinx Inc., billed as Pentek's highest-frequency PMC/XMC
transceiver module.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRq0EG
TOP NEWS ITEMS
--Altera raises Q3 sales target--
Altera increased its revenue guidance for the third quarter, saying it
now expects to report sales of between $279.2 million and $287.6
million, which would be flat to up 3 percent from the second quarter.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRr0EH
--GlobalFoundries to give UMC a run for its money --
Can GlobalFoundries Inc. overtake SMIC, TSMC and UMC in the foundry
business?
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRs0EI
--ATIC to buy, fold Chartered into GlobalFoundries--
ATIC said it will pay approximately $3.9 billion for Chartered
Semiconductor Manufacturing Co. Ltd., and fold the contract wafer
supplier into GlobalFoundries, its joint venture with Advanced Micro
Devices Inc.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRt0EJ
FEATURED BLOG
--An event like no other--
On Sept. 16, EE Times will present a virtual conference on designing
next-generation SoCs that promises to explore the challenges faced by
developers of both ASIC- and FPGA-based SoCs.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRu0EK
AVAILABLE COURSES
--TI Digital Power for the Latest Generation of Xilinx FPGAs eLAB
Series - Part 1 -- TI's Fusion Digital Power for Xilinx's Latest
Generation of FPGAs Series. Part One focuses on power requirements for
Xilinx Spartan-6 and Virtex-6 FPGAs, and features TI digital power
technology.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRv0EL
--Enabling a Ubiquitous Video Infrastructure --
As the number of people watching video on laptops and mobile devices
grows, what are the paramount questions that come to mind? How do
operators handle the surge in demand, and how does one leverage the
exceptional revenue growth opportunity this demand presents? This
presentation addresses the challenges for delivering a ubiquitous
video infrastructure and the technology available today to address the
issues.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRw0EM
--Low power and high precision with new TMS320C674x DSPs --
TI Applications engineering manager, Kimberly Wells, supplies a
summary of the key characteristics of the low-power,
fixed/floating-point C674x DSP. For the first time, developers will
have the ability to bring portability to audio, medical, industrial
and other applications requiring the precision, wide dynamic range and
time-to-market benefits of floating-point DSPs.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQyo0Eq
--Energy Efficient Solutions --
Learn about Energy Efficient Solutions from Freescale with experts
demonstrating real solutions. A new video is featured each week on the
Continuum Magazine.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQyn0Ep
FINAL NOTE
That's all for this week, but don't forget that this newsletter
contains only a subset of what's available on the Programmable Logic
DesignLine website.<p>
~~~~~~~~~~~~~~~~~~~ NOW HIRING ~~~~~~~~~~~~~~~~~~~
Electronics Group Now Hiring 09-09-2009
Osram Sylvania seeking Toolroom Machinist A in York, PA
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQbh0EM
MTA LIRR seeking Engineer - Signal Design in Jamaica, NY
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQbi0EN
SEL seeking Engineering Supervisor in King of Prussia, PA
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HFFR0EL
Boeing seeking Supplier Program Manager in Huntsville, AL
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQ820Ek
PricewaterhouseCoopers seeking IT Security Manager in McLean, VA
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQbk0EP
For more great jobs, career-related news, features and services,
please visit TechInsights EETimesCareers.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0EfwY0Ek
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~Around the Network Events~~~~~~~~~~~~~~~~~~
View Our Full List of Newsletters Here!
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0GyHd0EV
Webinar Services: Upcoming online broadcasts
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0E2Pd0EQ
Upcoming Conferences & Events:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0BjCO0Ej
Electronics Event Listings:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0DQwv0Er
EE Times Vendor Sponsored Product Information:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0CtAi0EK
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Unsubscribe
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Programmable Logic DesignLine respects your time and privacy.
If you are not interested in receiving future Programmable Logic
DesignLine Newsletters, please reply to this message with the word
"UNSUBSCRIBE" in the Subject area.
**PLEASE NOTE**You are currently subscribed under the e-mail address
newsletter (AT) list (DOT) fpgacentral.com
You must use this address when trying to unsubscribe.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Anything about **the contents of this newsletter**
--comments/suggestions/questions/letters for publication--can be
directed to the editor, Dylan McGrath:
dmcgrath (AT) techinsights (DOT) com
Any questions about **your profile or registration/change of address**
can be directed to:
designlines (AT) techinsights (DOT) com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
PASS IT ON. . .
Feel free to forward this newsletter to your colleagues
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Copyright 2009 TechInsights, a Division of United Business Media LLC
All rights reserved.
PRIVACY STATEMENT
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0DQZ0EQ
600 Community Drive
Manhasset, NY 11030
Programmable Logic DesignLine Newsletter
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The Programmable Logic DesignLine Newsletter is delivered to you free
of charge from the staff of Programmable Logic DesignLine.
To view the Programmable Logic DesignLine visit:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0DT6t0En
09-10-2009
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This issue sponsored by: Maxim
Maxim Secures Your FPGA Design with a Single Pin 1-Wire(r)
secure memories utilize a simple yet robust and easy to use
challenge-and-response authentication sequence that protects
the design investment from copying and cloning. Learn how
1-Wire can protect your investment:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRy0EO
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
EDITOR'S NOTE
Our how to design article this week tackles the problem of limited I/O
ports availability for a microcontroller. As with so many applications
today, FPGAs can be the solution. This article from Actel describes
how to deploy an 8051-based FPGA as an 8-bit MCU.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRl0EB
I'd also like to call special attention to my blog item this week. It
concerns the EE Times virtual conference on designing
next-generation SoCs. This is an event that I am certain many readers
will want to attend.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRm0EC
But wait, there's more! Read now and you can also take a look at all
of the best products and biggest news for the week. It's all here, all
free, and all delivered right to your inbox each week. How can you top
that?
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0FDtF0Ep
Questions, Ideas, Comments, Complaints? Email me, Dylan McGrath, at
dmcgrath (AT) techinsights (DOT) com.
FEATURED HOW-TO ARTICLE
--Control issues: How FPGAs can address MCUs' general-purpose I/O
scaling wall--
The general-purpose inputs and outputs ports available for a
microcontroller are usually limited in number. FPGAs can be deployed
to overcome this barrier by adding four 8-bit ports to any 8-bit
microcontroller. This article describes how to deploy an 8051-based
FPGA as an 8-bit microcontroller.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRn0ED
RECENT HOW-TO ARTICLES OF INTEREST
--Building high-speed FPGA memory interfaces--
This article examines the architecture behind the I/O blocks in
high-end FPGAs and how these FPGAs are able to achieve 533 MHz or 1067
Mbps data rates. It also examines the tools that are used to build a
memory interface, and provide a brief overview of the timing budget.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQyc0Ee
--Debugging hardware designs with an FPGA-based emulation tool--
Ludovic Larzul of EVE describes how embedded systems developers can
lower the cost of hardware debugging on their ASIC, FPGA and SoC
designs through the use of an FPGA-based emulation tool.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQY40EL
--Back to the basics: Doing Hardware Counter/Timer design using High
School Science-- Using the same unit-conversion techniques and
dimensional analysis techniques learned in high school, Zane Purvis
takes non-engineers and newcomers to embedded design step-by-step
through the configuration of a counter/timer.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQY70EO
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
TOP PRODUCTS
--Mentor offers IP platform for FPGA designs --
Mentor Graphics has brought out Precise-IP platform as part of its
Precision Synthesis product line. The platform includes
vendor-independent configurable IP from Mentor Graphics and links to
categorized third-party IP from leading vendors.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRo0EE
--Lattice rolls reference designs, dev kits --
Lattice Semiconductor this week announced the immediate availability
of eight new reference designs, a $49 development kit for the
ProcessorPM POWR605 power manager device and a $69 development kit for
the ispMACH 4000ZE CPLD.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRp0EF
--PMC/XMC transceiver module suited for wideband radar
countermeasures, MIL/COTS applications --
Pentek introduced a new data converter with two on-board Virtex-5
FPGAs from Xilinx Inc., billed as Pentek's highest-frequency PMC/XMC
transceiver module.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRq0EG
TOP NEWS ITEMS
--Altera raises Q3 sales target--
Altera increased its revenue guidance for the third quarter, saying it
now expects to report sales of between $279.2 million and $287.6
million, which would be flat to up 3 percent from the second quarter.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRr0EH
--GlobalFoundries to give UMC a run for its money --
Can GlobalFoundries Inc. overtake SMIC, TSMC and UMC in the foundry
business?
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRs0EI
--ATIC to buy, fold Chartered into GlobalFoundries--
ATIC said it will pay approximately $3.9 billion for Chartered
Semiconductor Manufacturing Co. Ltd., and fold the contract wafer
supplier into GlobalFoundries, its joint venture with Advanced Micro
Devices Inc.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRt0EJ
FEATURED BLOG
--An event like no other--
On Sept. 16, EE Times will present a virtual conference on designing
next-generation SoCs that promises to explore the challenges faced by
developers of both ASIC- and FPGA-based SoCs.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRu0EK
AVAILABLE COURSES
--TI Digital Power for the Latest Generation of Xilinx FPGAs eLAB
Series - Part 1 -- TI's Fusion Digital Power for Xilinx's Latest
Generation of FPGAs Series. Part One focuses on power requirements for
Xilinx Spartan-6 and Virtex-6 FPGAs, and features TI digital power
technology.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRv0EL
--Enabling a Ubiquitous Video Infrastructure --
As the number of people watching video on laptops and mobile devices
grows, what are the paramount questions that come to mind? How do
operators handle the surge in demand, and how does one leverage the
exceptional revenue growth opportunity this demand presents? This
presentation addresses the challenges for delivering a ubiquitous
video infrastructure and the technology available today to address the
issues.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HRRw0EM
--Low power and high precision with new TMS320C674x DSPs --
TI Applications engineering manager, Kimberly Wells, supplies a
summary of the key characteristics of the low-power,
fixed/floating-point C674x DSP. For the first time, developers will
have the ability to bring portability to audio, medical, industrial
and other applications requiring the precision, wide dynamic range and
time-to-market benefits of floating-point DSPs.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQyo0Eq
--Energy Efficient Solutions --
Learn about Energy Efficient Solutions from Freescale with experts
demonstrating real solutions. A new video is featured each week on the
Continuum Magazine.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQyn0Ep
FINAL NOTE
That's all for this week, but don't forget that this newsletter
contains only a subset of what's available on the Programmable Logic
DesignLine website.<p>
~~~~~~~~~~~~~~~~~~~ NOW HIRING ~~~~~~~~~~~~~~~~~~~
Electronics Group Now Hiring 09-09-2009
Osram Sylvania seeking Toolroom Machinist A in York, PA
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQbh0EM
MTA LIRR seeking Engineer - Signal Design in Jamaica, NY
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQbi0EN
SEL seeking Engineering Supervisor in King of Prussia, PA
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HFFR0EL
Boeing seeking Supplier Program Manager in Huntsville, AL
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQ820Ek
PricewaterhouseCoopers seeking IT Security Manager in McLean, VA
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0HQbk0EP
For more great jobs, career-related news, features and services,
please visit TechInsights EETimesCareers.
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0EfwY0Ek
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~Around the Network Events~~~~~~~~~~~~~~~~~~
View Our Full List of Newsletters Here!
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0GyHd0EV
Webinar Services: Upcoming online broadcasts
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0E2Pd0EQ
Upcoming Conferences & Events:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0BjCO0Ej
Electronics Event Listings:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0DQwv0Er
EE Times Vendor Sponsored Product Information:
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0CtAi0EK
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Unsubscribe
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Programmable Logic DesignLine respects your time and privacy.
If you are not interested in receiving future Programmable Logic
DesignLine Newsletters, please reply to this message with the word
"UNSUBSCRIBE" in the Subject area.
**PLEASE NOTE**You are currently subscribed under the e-mail address
newsletter (AT) list (DOT) fpgacentral.com
You must use this address when trying to unsubscribe.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Anything about **the contents of this newsletter**
--comments/suggestions/questions/letters for publication--can be
directed to the editor, Dylan McGrath:
dmcgrath (AT) techinsights (DOT) com
Any questions about **your profile or registration/change of address**
can be directed to:
designlines (AT) techinsights (DOT) com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
PASS IT ON. . .
Feel free to forward this newsletter to your colleagues
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Copyright 2009 TechInsights, a Division of United Business Media LLC
All rights reserved.
PRIVACY STATEMENT
http://newsletter.designlinenetwork.com/cgi-bin4/DM/y/eBT2q0RqYrT0LOB0DQZ0EQ
600 Community Drive
Manhasset, NY 11030