jerome0613
11-28-2005, 08:16 PM
Hello
I'm having some problems to make my code running on 2 x TS203 rev 1.2 an
VisualDSP 4.0.
My small code toggles FLAG0 output pin, here are my results :
1- When simulating using TS203 : OK : I can see register FLAGREG togglin
according to the code.
2- When running on TS201 eval board with the same code (via JTAG) : OK :
can see both register FLAGREG and FLAG0 pin toggling according to th
code.
3- When running on TS203 own board with the same code (via JTAG) :
cannot see the register FLAGREG nor FLAG0 pin toggling according to th
code. The step by step debugger works fine, as well as the SDRAM (
performed successive write/read), but I cannot see the pin toggling, no
the register FLAGREG.
FLAGREG is supposed to be 0000 at reset, I read FFFF once the code i
transfered to the DSP via JTAG !?
4- I performed another test using TS201 processors in VisualDSP while m
board features TS203. In this case I can see the register FLAGREG properl
toggling but not the TS203 pin.
It sounds like it is a VisualDSP registers definition for TS203 which doe
not match the real TS203 registers.
Here is my small test code, working fine on TS201 eval board, as well a
when simulating on TS203 :
#include <defts203.h>
#include <sysreg.h>
#include <builtins.h>
#define SET_FLAG(x) asm("FLAGREGST=%0;;"::"y"(x))
#define CLR_FLAG(x) asm("FLAGREGCL=%0;;"::"y"(x))
void main(void){
int i;
SET_FLAG(FLAGREG_FLAG0_EN);
while(1)
{
SET_FLAG(FLAGREG_FLAG0_OUT);
for(i=0;i<10;i++);
CLR_FLAG(~FLAGREG_FLAG0_OUT);
for(i=0;i<10;i++);
}
} /* end main */
Please note I changed the following in the ADSP-TS203.xml file :
I had to modify the syscon default value
<Register Name="SYSCON" ResetValue="0x00009067" Core="Common" />
instead of
<Register Name="SYSCON" ResetValue="0x00189067" Core="Common" />
because of the 32bits bus and not 64 (otherwise I can see only eve
address working), now odd/even address are ok on the sdram
Any help would be greatly appreciated
Jerome
I'm having some problems to make my code running on 2 x TS203 rev 1.2 an
VisualDSP 4.0.
My small code toggles FLAG0 output pin, here are my results :
1- When simulating using TS203 : OK : I can see register FLAGREG togglin
according to the code.
2- When running on TS201 eval board with the same code (via JTAG) : OK :
can see both register FLAGREG and FLAG0 pin toggling according to th
code.
3- When running on TS203 own board with the same code (via JTAG) :
cannot see the register FLAGREG nor FLAG0 pin toggling according to th
code. The step by step debugger works fine, as well as the SDRAM (
performed successive write/read), but I cannot see the pin toggling, no
the register FLAGREG.
FLAGREG is supposed to be 0000 at reset, I read FFFF once the code i
transfered to the DSP via JTAG !?
4- I performed another test using TS201 processors in VisualDSP while m
board features TS203. In this case I can see the register FLAGREG properl
toggling but not the TS203 pin.
It sounds like it is a VisualDSP registers definition for TS203 which doe
not match the real TS203 registers.
Here is my small test code, working fine on TS201 eval board, as well a
when simulating on TS203 :
#include <defts203.h>
#include <sysreg.h>
#include <builtins.h>
#define SET_FLAG(x) asm("FLAGREGST=%0;;"::"y"(x))
#define CLR_FLAG(x) asm("FLAGREGCL=%0;;"::"y"(x))
void main(void){
int i;
SET_FLAG(FLAGREG_FLAG0_EN);
while(1)
{
SET_FLAG(FLAGREG_FLAG0_OUT);
for(i=0;i<10;i++);
CLR_FLAG(~FLAGREG_FLAG0_OUT);
for(i=0;i<10;i++);
}
} /* end main */
Please note I changed the following in the ADSP-TS203.xml file :
I had to modify the syscon default value
<Register Name="SYSCON" ResetValue="0x00009067" Core="Common" />
instead of
<Register Name="SYSCON" ResetValue="0x00189067" Core="Common" />
because of the 32bits bus and not 64 (otherwise I can see only eve
address working), now odd/even address are ok on the sdram
Any help would be greatly appreciated
Jerome