Altera Inside Edge eNewsletter
10-14-2009, 03:00 PM
To view a web version of this message online, please visit:
http://cm.altera.com/g/?NBNTBQMPXF:NBNTBQMPXF=ssID:528807980,email:NEWSLE TTER (AT) LIST (DOT) FPGACENTRAL.COM,mode:live
Inside Edge
Altera's Monthly eNewsletter - October 2009
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Monthly Spotlight
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New Stratix IV E Device-the Industry's Highest Density 40-nm FPGA
http://www.altera.com/products/devices/stratix-fpgas/stratix-iv/overview/density/stxiv-density.html
Simplify your design partitioning and accelerate your verification cycle with the newest member of the Stratix(R) IV family. The EP4SE820 device has 820K logic elements, 23.1 Mbits of memory and 1,120 I/O pins, making it the logical choice for ASIC prototyping and design emulation.
FPGAs, CPLDs & ASICs
------------------------------------------------------------
Video: See 100G Interlaken Solution on 40-nm High-Density FPGA
http://www.accelacomm.com/jaw/IEOct09/0/50634412/
See an Altera(R) Interlaken solution running on our 100G demo board and learn about the design advantages of 40-nm Stratix IV GT FPGAs.
Video: See PCIe, XAUI, and 3G-SDI on an Arria II GX Transceiver FPGA
http://www.accelacomm.com/jaw/IEOct09/0/50604854/
See how implementing various protocols on Arria(R) II GX devices can lower cost and power. Also, view the transceiver's eye diagram.
Software, Intellectual Property & Development Kits
------------------------------------------------------------
Buy Quartus II Software & Get a Nios II Evaluation Kit for $99
http://www.altera.com/b/quartus-nios-promo.html
Available to the first 300 Customers—purchase Quartus(R) II Software at full price and get a Nios(R) II Embedded Evaluation Kit for $99 ($350 savings).
Embedded Linux for the Nios II Processor
http://www.altera.com/products/ip/processors/nios2/tools/embed-partners/ni2-linux-partners.html
You can now choose from a wide range of embedded providers, including free open-source distributions to full commercial support.
Technology & End Markets
------------------------------------------------------------
Webcast: Designing with Multiple Industrial Ethernet Standards
http://www.accelacomm.com/jaw/IEOct/0/50614861/
See how to design with a flexible FPGA platform that supports any Ethernet protocol, savingÂ*time and lowering your cost of ownership.
Webcast: Upgrade Your Broadcast System to PCIe Gen2
http://www.accelacomm.com/jaw/IEoct/0/50611883/
PCIe Gen2 offers interfaces with increased bandwidth for 1080p video. Learn techniques for bridging 3G Triple-Rate SDI to PCIe Gen2.
App Note: DPRIO and Multiple Instances SDI Application (PDF)
http://www.altera.com/literature/an/an587.pdf
Learn how to control multiple SDI cores across several transceiver blocks using the Dynamic Reconfiguration Controller.
White Paper: Cost-Optimized FPGAs Deliver OTN Mapper Solutions (PDF)
http://www.altera.com/literature/wp/wp-01114-otn-mapper.pdf
Read how telecommunications carriers plan to transition their existing infrastructure to a more cost-per-bit effective transport technology.
Support & Literature
------------------------------------------------------------
App Note: Timing Closure Methodology for FPGA Designs (PDF)
http://www.altera.com/literature/an/an584.pdf
Achieve quick timing closure using the practical tips and design examples provided in the application note.
From the Altera Forum: DMA Transfer Issue
http://www.alteraforum.com/forum/showthread.php?t=6835
Forum user Bhupesh has a problem transferring data between memory interfaces using DMA. Read comments and post your advice.
Events & Training
------------------------------------------------------------
Free Online Class: Serial RapidIO Design with Altera 40nm Devices
http://www.altera.com/education/training/courses/ORIO1115
Learn to design Serial RapidIO(R) transceivers for your device-develop and verify a custom protocol Serial RapidIO solution in an FPGA.
BeMicro "Lab on a Stick" Embedded Processor Workshops
http://www.arrow.com/bemicro
Ever wondered what it's really like to use a soft core processor? Find out by building and running your own system on the BeMicro board.
Intel(R) AtomTM - Altera I/O Hub Hands-On Workshops (Europe)
www.training-registration.com
Find out how PCI Express delivers high-performance I/O expansion and co-processing support on the Gleichmann Industrial Reference Platform.
Altera in the News
------------------------------------------------------------
FPGAs Enable Energy-Efficient Motor Control, Industrial Embedded.com
http://www.industrial-embedded.com/articles/id/?3976
Learn how FPGAs can integrate processor, Industrial Ethernet/fieldbus standards, custom motor interfaces, and DSP functions in one device.
Building High-Speed FPGA Memory Interfaces, PLD DesignLine
http://www.pldesignline.com/howto/219501113;jsessionid=X3VPKNOYOSCHZQE1GHRSKHWATMY32 JVN
To build reliable memory interfaces, target FPGA I/O structures, as well as IP used in design software,for rapid configuration and extra timing margin.
Most Popular News from Last Issue
White Paper: The Energy-Aware Approach to Home Energy Control (PDF)
http://www.altera.com/literature/wp/wp-01077-energy-aware-appliance-platform.pdf
Learn how to develop cost-effective, energy-aware solutions that allow homeowners to monitor appliance energy use via a home area network, appliance manufacturers to provide improved service to customers, and utility companies to lower energy consumption via the Internet.
------------------------------------------------------------
As a subscriber to the Inside Edge eNewsletter, you will receive a monthly email newsletter.
To subscribe or unsubscribe from Altera email updates and enewsletters please visit our Email Subscription Center:
http://cm.altera.com/g/?SQ3PUNU3NR:T5QAP0664K=ssID:503252350,email:SLINDE NK (AT) ALTERA (DOT) COM,mode:test
Copyright(C) 1995-2009 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA
ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.
http://cm.altera.com/g/?NBNTBQMPXF:NBNTBQMPXF=ssID:528807980,email:NEWSLE TTER (AT) LIST (DOT) FPGACENTRAL.COM,mode:live
Inside Edge
Altera's Monthly eNewsletter - October 2009
------------------------------------------------------------
Monthly Spotlight
------------------------------------------------------------
New Stratix IV E Device-the Industry's Highest Density 40-nm FPGA
http://www.altera.com/products/devices/stratix-fpgas/stratix-iv/overview/density/stxiv-density.html
Simplify your design partitioning and accelerate your verification cycle with the newest member of the Stratix(R) IV family. The EP4SE820 device has 820K logic elements, 23.1 Mbits of memory and 1,120 I/O pins, making it the logical choice for ASIC prototyping and design emulation.
FPGAs, CPLDs & ASICs
------------------------------------------------------------
Video: See 100G Interlaken Solution on 40-nm High-Density FPGA
http://www.accelacomm.com/jaw/IEOct09/0/50634412/
See an Altera(R) Interlaken solution running on our 100G demo board and learn about the design advantages of 40-nm Stratix IV GT FPGAs.
Video: See PCIe, XAUI, and 3G-SDI on an Arria II GX Transceiver FPGA
http://www.accelacomm.com/jaw/IEOct09/0/50604854/
See how implementing various protocols on Arria(R) II GX devices can lower cost and power. Also, view the transceiver's eye diagram.
Software, Intellectual Property & Development Kits
------------------------------------------------------------
Buy Quartus II Software & Get a Nios II Evaluation Kit for $99
http://www.altera.com/b/quartus-nios-promo.html
Available to the first 300 Customers—purchase Quartus(R) II Software at full price and get a Nios(R) II Embedded Evaluation Kit for $99 ($350 savings).
Embedded Linux for the Nios II Processor
http://www.altera.com/products/ip/processors/nios2/tools/embed-partners/ni2-linux-partners.html
You can now choose from a wide range of embedded providers, including free open-source distributions to full commercial support.
Technology & End Markets
------------------------------------------------------------
Webcast: Designing with Multiple Industrial Ethernet Standards
http://www.accelacomm.com/jaw/IEOct/0/50614861/
See how to design with a flexible FPGA platform that supports any Ethernet protocol, savingÂ*time and lowering your cost of ownership.
Webcast: Upgrade Your Broadcast System to PCIe Gen2
http://www.accelacomm.com/jaw/IEoct/0/50611883/
PCIe Gen2 offers interfaces with increased bandwidth for 1080p video. Learn techniques for bridging 3G Triple-Rate SDI to PCIe Gen2.
App Note: DPRIO and Multiple Instances SDI Application (PDF)
http://www.altera.com/literature/an/an587.pdf
Learn how to control multiple SDI cores across several transceiver blocks using the Dynamic Reconfiguration Controller.
White Paper: Cost-Optimized FPGAs Deliver OTN Mapper Solutions (PDF)
http://www.altera.com/literature/wp/wp-01114-otn-mapper.pdf
Read how telecommunications carriers plan to transition their existing infrastructure to a more cost-per-bit effective transport technology.
Support & Literature
------------------------------------------------------------
App Note: Timing Closure Methodology for FPGA Designs (PDF)
http://www.altera.com/literature/an/an584.pdf
Achieve quick timing closure using the practical tips and design examples provided in the application note.
From the Altera Forum: DMA Transfer Issue
http://www.alteraforum.com/forum/showthread.php?t=6835
Forum user Bhupesh has a problem transferring data between memory interfaces using DMA. Read comments and post your advice.
Events & Training
------------------------------------------------------------
Free Online Class: Serial RapidIO Design with Altera 40nm Devices
http://www.altera.com/education/training/courses/ORIO1115
Learn to design Serial RapidIO(R) transceivers for your device-develop and verify a custom protocol Serial RapidIO solution in an FPGA.
BeMicro "Lab on a Stick" Embedded Processor Workshops
http://www.arrow.com/bemicro
Ever wondered what it's really like to use a soft core processor? Find out by building and running your own system on the BeMicro board.
Intel(R) AtomTM - Altera I/O Hub Hands-On Workshops (Europe)
www.training-registration.com
Find out how PCI Express delivers high-performance I/O expansion and co-processing support on the Gleichmann Industrial Reference Platform.
Altera in the News
------------------------------------------------------------
FPGAs Enable Energy-Efficient Motor Control, Industrial Embedded.com
http://www.industrial-embedded.com/articles/id/?3976
Learn how FPGAs can integrate processor, Industrial Ethernet/fieldbus standards, custom motor interfaces, and DSP functions in one device.
Building High-Speed FPGA Memory Interfaces, PLD DesignLine
http://www.pldesignline.com/howto/219501113;jsessionid=X3VPKNOYOSCHZQE1GHRSKHWATMY32 JVN
To build reliable memory interfaces, target FPGA I/O structures, as well as IP used in design software,for rapid configuration and extra timing margin.
Most Popular News from Last Issue
White Paper: The Energy-Aware Approach to Home Energy Control (PDF)
http://www.altera.com/literature/wp/wp-01077-energy-aware-appliance-platform.pdf
Learn how to develop cost-effective, energy-aware solutions that allow homeowners to monitor appliance energy use via a home area network, appliance manufacturers to provide improved service to customers, and utility companies to lower energy consumption via the Internet.
------------------------------------------------------------
As a subscriber to the Inside Edge eNewsletter, you will receive a monthly email newsletter.
To subscribe or unsubscribe from Altera email updates and enewsletters please visit our Email Subscription Center:
http://cm.altera.com/g/?SQ3PUNU3NR:T5QAP0664K=ssID:503252350,email:SLINDE NK (AT) ALTERA (DOT) COM,mode:test
Copyright(C) 1995-2009 Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA
ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS & STRATIX are Reg. U.S. Pat. & Tm. Off. and Altera marks in and outside the U.S.