On 2/5/2010 5:40 AM, rickman wrote:
>>
>> To the OP, in the absence of micro-vias, I would recommend a 6 layer
>> board. Maybe like this:-
>>
>> signal
>> signal
>> ground
>> ground
>> power/signal
>> signal
>>
>
> Everyone has their own way of doing things, but I would ask, why the
> two ground planes? I would have a ground plane and a power plane in
> the center with a minimum thickness between them. The spacing between
> the ground/power plane and the signal plane is not so important. What
> is important is the characteristic impedance. The lower the
> impedance, the less it will radiate. Of course, with thin traces you
> have to have the signal plane to power/ground plane very small to get
> a low impedance. But if you have wide traces, you can open up the
> plane spacing. Since the outer layers are on the outside of the
> board, they won't be very close to inside power/ground planes. BTW,
> you are aware that the power plane is just as effective as the ground
> plane for determining the impedance.
>
> Rick

Hi Rick,

In my designs, and perhaps yours too, the power plane, such as it is, is
useless as a reference plane for the simple reason that it's chopped up
into many different pours for all the different voltages. I don't think
you are suggesting a separate layer for each separate voltage? So, there
will be slots in the plane, and every time a fast signal passes across
this slot, you'll get the thing radiating as a good slot antenna does!
You could add a bunch of bypass caps to bridge between the planes, but
there's rarely space for this with a dense BGA design. For sure, if your
planes are close together in the middle of your stack, this problem is
small, but then you need wider surface traces to get the impedance you
require.
So, I recommend multiple ground planes close to all your signals. A
thick core in the centre of the board to make up the correct thickness.
Then you can simply forget about any slot issues. Like you say, this
lets you keep the traces thin and with a lower characteristic impedance,
which is normally what you want when routing BGA FPGAs. The two ground
planes should be well bonded with vias, so there isn't a problem when a
signal goes through a via and passes from being referred to one ground
plane to the other.

I reject the notion of placing a power plane and a ground plane close
together in the middle of the board to get the benefit of the
inter-plane capacitance for bypassing reasons. Don't get me wrong, it
won't hurt, but IMO the amount of capacitance gained is tiny, and even
though it is a very high Q capacitor, getting the power to the die is
stymied by the inductance of the vias and BGA balls that are part of the
PDS. If your power plane is in the middle of the board, the signal path
of these vias are longer. You don't care about the supply stiffness on
your plane, it's on the die that counts. If you graunch off the metal
cover of an FPGA you'll see that the manufacturer has already had to add
bypass caps on the BGA substrate for this very reason. Furthermore, if
you have a PCB ground plane close to the surface and hence close to the
FPGA, the cavity between the PCB ground plane and the ground plane in
the FPGA is smaller, reducing the inductance of the vias and BGA balls
and so reducing stuff like ground bounce.
So, IMO, the disadvantages of having the planes further from your
signals and components more than outweigh the tiny gain in bypass
capacitance you gain.

I say better is to put your bypass caps as close as possible to the
FPGA, and maybe use puddles of copper close to the ground planes to
maximise the via and capacitor utilization. Here's an article showing
what I mean. Fig. 2.

http://www.x2y.com/bypass/mount/backside_cap.pdf

Whatever, YMMV, and I'm sure your designs work just fine. It's hard to
cock it up, but I contend that the dual ground plane design I suggest
above is nigh on impossible to go wrong with from an SI point of view,
even if you have absolutely no clue what you're doing. That's why I use it!

Cheers, Syms.