Re: Board layout for FPGA
> John,
> I don't think I can get away with only the outer two rows of balls,
> I'll probably need the two inside of that as well-- I was thinking of
> breaking out the outer two on one signal layer and the inner two in
> another, as suggested in the Xilinx app note I saw. It was a tight
> squeeze but they wrote .127mm traces, and .3/.6mm on the vias, which
> is the standard offering of the board house we're using.. it's
> possible to ask for smaller, for an extra chunk of change.
With 1mm ball pitch I use 0.5mm pads, 0.5mm vias with 0.25mm drills.
This is pretty much run of the mill for fab houses and shouldn't
add much to costs.
The first four balls can then be routed out on the top and bottom
layers.
Nial
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