In comp.arch.fpga,
Alex <[email protected]> wrote:
> On 2 фев, 09:14, glen herrmannsfeldt <g...@ugcs.caltech.edu> wrote:
>> Alex <vict...@gmail.com> wrote:
>> > I have started using Xilinx Spartan3E 1600E Microblaze Development
>> > Board and want to use its RS232 facility in my project. This board has
>> > two RS232 connectors but I cannot figure out what UART it uses. I was
>> > searching for UART chip on the board (I was actually searching for a
>> > MAXIM chip) and have seen none.
>>
>> It would be unusual to put a UART on an FPGA development board.
>>
>> You should implement one in the FPGA logic.
>>
>> -- glen
>
> I also had this thought until had noticed that MAXIM UART device is
> mentioned on page 61 of ug257:
>
> The FPGA supplies serial output data using LVTTL or LVCMOS levels to
> the Maxim device,
> which in turn, converts the logic value to the appropriate RS-232
> voltage level. Likewise,
> the Maxim device converts the RS-232 serial input data to LVTTL levels
> for the FPGA. A
> series resistor between the Maxim output pin and the FPGA’s RXD pin
> protects against
> accidental logic conflicts.
>
> I am really puzzled!

That's because you snipped the last line of Glen's reply:

>> The RS232 level shift/buffers should be on the board, though.

The 'Maxim' chip _is_ the level shifter. Should be something like a
MAX232 (google for that). But it will probably be a low voltage version
like the MAX3221 or a simular chip from another manufacturer.

So the UART is in the FPGA, the level shifter ("Maxim") outside. Isn't
there a schematic in the user guide?


--
Stef (remove caps, dashes and .invalid from e-mail address to reply by mail)

The soul would have no rainbow had the eyes no tears.