I’m working on an FPGA implementation of an ITU J.83 Annex A
modulator; I know this is kind of re-inventing the wheel . . . but I
wanted to see if I could do it. Well I’ve finished the modulator and
it’s working great with our demodulator for 16QAM, 32QAM, and 128QAM.
What I can’t figure out is that for 64QAM and 256QAM I can’t get our
demodulator (based on Broadcom’s BCM3510 chip) to achieve FEC lock. I
can get QAM lock and an MER above 40dB, but that’s it.

So finally to my question . . . I’m wondering if any of you remember
any special cases surrounding 64QAM or 256QAM in the modulation
process. The ITU J.83 and the DVB-C spec don’t seem to mention any,
but maybe I missed something? I’m feeding the modulator with MPEG
null packets, so one thing I’m suspecting is that the BCM3510
demodulator won’t work on 64QAM and 256QAM with MPEG null packets, but
I’m having a hard time believing it since it’s happy with them for 16,
32, and 128QAM. I’ve also double checked my constellation mapping
with the specs and they match what the spec says, I’m hoping the specs
don’t have a typo :-).

Any help or guidance you can give me would be greatly appreciated.

Thanks
Brett