HI all

This may be a bit late too help you but I just came across a new Free JTAG tool for pin-toggling and contiunuity testing. It can be downloaded form
www.jtaglive.com and it will work on Altera and Xilinx cables but not yet Quicklogic I think.

Since it is based on the JTAG/boundary-scan IEEE Std 1149 it works with all FPGAs and other JTAG parts. It will import the BSDL file referred to above an enable you to set up pin toggles without any JTAG knowledge. Might be worth a look.

Cheers

Des