On Nov 11, 4:59*pm, -jg <jim.granvi...@gmail.com> wrote:
> On Nov 12, 10:41*am, Didi <d...@tgi-sci.com> wrote:> On Nov 11, 11:13*am, -jg <jim.granvi...@gmail.com> wrote:
>
> > > ....
> > > I've sent Dimiter a disk image of an .ABL project compiled into a
> > > XCR3128, so he can check what has changed....
>
> > While having my morning coffee at 11 PM (still half full) I tried
> > the newest version I have here (ISE11) on my test project, the one
> > with the one toggling bit shifting through another five.
> > I got a warning that the project would be converted to a new
> > format not usable by older versions; and a promise the old
> > version would be zipped somewhere (yet to check that, but I
> > have the source on my DPS disk beyond any alien access anyway).
> > The the project got open, but the Abel source was gone; the
> > top source now was its translation to vhdl.
>
> *Fair enough, I thought,
>
> > I was warned for that sort of thing.
>
> Err No. I'd say NOT fair-enough.
> WHY should they need to replace YOUR source code ?
>
> If they have Abel-to-VHDL working, then simply run that in the
> background.
>
> I was told by a friend a couple of years back, that was how Xilinx
> handled his abel - it did VHDL spins, but they were 'hidden', and it
> took Xilinx a few months to knock the edges off that change, but it
> DID sound like it all worked.
>
> > What I was not warned of
> > was the fact that it would no longer work... It just won't
> > compile, I think it does not preserve the pin numbers I
> > have assigned in the Abel file.
> > I suppose it can be tweaked to eventually work, if there
> > were any sane reason why someone would want to do that.
> > I don't, that's sure :-).
> > But I was reminded once more why it is so important
> > to have all design tools under control, the coolrunner
> > series is the finest programmable silicon I have seen and
> > I clearly will have to adapt my lc to the 3 and perhaps
> > 2 series, hopefully they will live for another while.
>
> *Have you looked at the Atmel ATF1508RE ?
> I use the CUPL tool flows on their ATF15xx family.
> *It compiles in a fraction of a second, has a stable, flash-Drivable
> image and it can create test vector files.
> *Hooked to a button in my favourite text editor.
> Simple.Stable.Bulletproof (well, almost: Zero Angst)
>
> -jg

I would not consider ISE 11 for anything but the very latest
FPGA's. ISE 6.3 is probably the most stable version and if
your device is included, you should use it.

I have to admit that I use Verilog almost exclusively for
projects since moving away from Foundation 4.1 (the
Aldec-based one) which had decent schematics. I still
have that version running to support old projects, but
I think it may predate the Coolrunner II. In any case
that version certainly had Abel and I used it. It also
had serious bugs including an inability to deal with
paths that are not 8.3 all the way up from the root
and a necessity to have the execution path point to
the Abel compiler even when running from the GUI. The
usual symptom if your file name was longer than 8 characters
was to fail with no explanation given.

Xilinx has already decided to orphan some older FPGA
products with ISE 11. ISE 10.1.03i is the last version
to support the older parts. It is also fairly stable
and you can get the webpack version with a little bit
of browsing (older versions are referred to as "classic").

In any case the GUI for newer tool versions seems to
get less intuitive and more clunky with each version,
as you have no doubt seen. I don't think Xilinx ever
had a version that would allow top-level code in Abel,
but I could be wrong on that because most of my designs
are FPGA based rather than CPLD where top-level Abel
would make sense. If you need to do anything serious
with Coolrunner I'd suggest moving to VHDL or Verilog
just to avoid the crappy schematic editor.

Oh for the days of PALASM...

Regards,
Gabor