On Nov 11, 3:17*am, Didi <d...@tgi-sci.com> wrote:
> ....
> So I seem to be stuck - no Xilinx tool I have managed to locate
> so far will do Abel -> jedec.
> ....

No longer that. I located on my disk something I had downloaded
some months back while planning this effort - webpack 6.3i., on
someones advice IIRC.
It does seem to compile ABEL files, gets stuck at the end
(with my source only) so far but this is after it generates
the jedec file which is what I am after. Cannot see what it thinks
it has done in the html report (it just does not work, "child process
failed"), but well, this is a step in the right direction.

But I am sure I will have to invest a few weeks into integrating
the xpla3 into my logic compiler, these xilinx tools just
are not usable.
Here is a simple source for a 64 cell coolrunner from the Philips
times: http://tgi-sci.com/misc/mb2ata.txt , I am used to be
able to generate that within < a day...

I will of course still welcome all help, I am still far from
done with this.

Dimiter

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