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Old 07-06-2009, 01:49 PM
zorjak zorjak is offline
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Location: Belgrade, Serbia
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Default Mig

I remember that I was trying to do something with MIG core (memory interface generator). try reading can it helps you. But I think that you have to find out how data are written in the ram meory. you have to read datasheet detailed first. when you understand timing diagrams it won't be so hard to write your interface in vhdl.
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