On Fri, 3 Jul 2009 23:19:43 +0800, Jonathan Bromley wrote
(in article <[email protected]>):

> On Fri, 3 Jul 2009 18:48:55 +0800, steve wrote:
>
>> It looks like it will not work, after adding in the library , it compiles
>> fine, but as soon as it links up to chipscope....
>> to_slv(xxx)
>>
>> FATAL_ERROR:Xst:Portability/export/Port_Main.h:143:1.17 - This application
>> has discovered an exceptional condition from which it cannot recover.
>
> That'll be a bug, then :-)
>
> I'd guess it's related to the use of a conversion
> function in the port map, which is perfectly legal
> but isn't so commonly used, so maybe has not been
> debugged as thoroughly as one might hope.
>
> Try using the conversion function to put the value
> onto a new std_logic_vector signal, and then hook
> that signal to the appropriate ports. Might give
> the tools rather less of a headache. I synthesized
> a small design with the conversion function in it,
> so there's no fundamental problem!
>
> Walter's simpler approach needs an extra signal
> in any case.
>

That was my second thought :-) , and the damned thing compiles and works!!
You can stick the result of the conversion into a variable:

signal dummy :std_logic_vector (0 to
NAND_WR_SM_TYPE'POS(NAND_WR_SM_TYPE'HIGH));
.......

TRIG3(0 to NAND_WR_SM_TYPE'POS(NAND_WR_SM_TYPE'HIGH)) => dummy, --"000",
--to_slv(nand_wr_ns),

once I had the 'mental' tools , the solution presented it's self.


Steve