On Jul 2, 9:08*am, Kim Enkovaara <kim.enkova...@iki.fi> wrote:

> In the original message there is some kind of mixup, it speaks about 4x
> PCIe, but 8 lanes, or did he want 2*4x PCIe. 4xPCIe with lowcost FPGAs
> might also be quite challenging design.

Sorry.

My asumptions:

PCI-e x 1 =2 differential pairs ( 2x Rx + 2* Tx )
PCI-e x 4 = 8 differential pairs ( 4x Rx + 4* Tx )
1 lane = one differential pair

It seems from your question that i should count 1 PCI-e lane as 2
diff. pairs ( 1Rx + 1 Tx ) ?