steve escribió:
>
> As regards , changing the logic/ optimization, I'm already aware of that.
> when I try and put my chipscope external to my user_logic and probe
> internally, sometimes the stuff is accessible , other times it disappears, I
> keep looking to see if paul Daniels is behind me..
>
> Like I say these tools and systems are gash, good job Xilinx would never
> dare charging for them. ;-)
>

FPGA and Xilinx software are not easy to drive, as a Porsche, but when
you know how; you have a good chance to win;

user_logic sound as you are using others cores into your project, correct ?

Walter