This should probably go in to the funny error messages folder:

=============== (running make bits within xps) ===============
ChipScope Core Generator command: coregen -b
/home/rudi/reference_designs/ml507_satah/implementation/
chipscope_icon_0_wrapper
/implementation/chipscope_ila_0.xco
ERROR:MDT - chipscope_ila_0 (chipscope_ila) - Release 10.1 - Xilinx
CORE
Generator K.39 (lin64)
Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.
All runtime messages will be recorded in
/home/rudi/reference_designs/ml507_satah/implementation/
chipscope_icon_0_wrap
per
/implementation/chipscope_ila_0_wrapper/coregen.log
Regenerating IP...
Gathering HDL files for chipscope_ila_0 root...
Creating XST project for chipscope_ila_0...
Creating XST script file for chipscope_ila_0...
Creating XST instantiation file for chipscope_ila_0...
Running XST for chipscope_ila_0...
Not generating a VHDL simulation model
Not generating a Verilog simulation model
Skipping VHDL instantiation template for chipscope_ila_0...
Skipping Verilog instantiation template for chipscope_ila_0...
Finished Regenerating.
Successfully generated chipscope_ila_0.
WARNING: verilog is not supported as a language. Using usenglish.
while executing
"error $errMsg"
(procedure "::hw_chipscope_ila_v1_02_a::ila_generate" line 121)
invoked from within
"::hw_chipscope_ila_v1_02_a::ila_generate 94898336"
ERROR:MDT - platgen failed with errors!
make: *** [implementation/sata_host.bmm] Error 2
Done!
================================================== ==============

This is on the Latest Fedora (11) release, x86_64.

Anybody knows where this error is coming from ? Didn't have that
on previous Fedora releases ...

Thanks,
luudee