[email protected] <[email protected]> wrote:
(snip)

> yes, ASFAIK all FPGA's except Spartan-6 remain in CONFIG mode
> until valid CRC and post-amble...

> well, i think it all is really ES errata
> but for some reason there is no errata sheet available, and it is
> described in regular datasheet

Without making too many guesses about the internal structure
of FPGAs, it might take fewer transistors if some internal
signals are active as the bits are loaded. It sounds like
zeros are good and ones are bad.

-- glen