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Old 06-22-2009, 08:07 PM
Jonathan Bromley
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Default Re: Question on FPGA driver

On Mon, 22 Jun 2009 10:46:51 -0700 (PDT), Test01 wrote:

>This is a single ended signal running at 32KHz. It is a free running
>clock running at 32KHz.


In which case I suggest you think about a few resistors
and some simple circuit calculations :-)
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Jonathan Bromley, Consultant

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