Rob, John thanks for reply.


>> 2. R => not R, S => not S


That's the point.
Your suggestion would infer an inverter realized in a LUT.
I don't want to infer extra inverter logic in the CLB. I want the
inverter for free.

In the Storage Elements Section of the User Guide for Spartan it is
statet that
"All signals have programmable polarity; the default active-High
function is described."

So, I am looking for a way to configure the polarity of the set/reset
signals of a FDRSE.


>> Out of curiosity, why would you need to be directly instantiating flops?


I want to use the three inputs (set, reset and data) of the FDRSE at
the same time
without infering extra LUT-Logic.

Something like this:

Connect signal a to set-input, signal b to reset-input and signal c to
data-input.


Thanks for your contribution.