On Wed, 20 May 2009 19:16:41 -0700 (PDT), andrew.newsgroup@gmail.com wrote:

>Hi,
>We are switching to a makefile to build our Xilinx FPGA bit files. Can
>we expect to get an identical bit file (except for date/time in the
>bitfile header) if we build through the ISE gui vs building via the
>command line?
>
>What we have found is that the output ngd file from the ngdbuild
>process (Translate) is not the same in both cases. The file size
>differs by 100 bytes, and the resulting bitfiles end up being very
>different. Can we expect the ngd file to be identical?
>
>We use synplicity to synthesize the design, which creates an edif
>netlist. The edif netlist going into the ISE flow and makefile flow
>are identical.
>

You'd like to think so, and if ALL the flags and options are identical, I
believe it should be the case. But achieving that may not be trivial.

Try running Translate from the command line with the exact command line given in
the ".cmdlog" file - including the "-intstyle ISE" flag and see if that gives
the same result as the GUI flow.

The 'project.ise' can supposedly be exported as a script, reading which should
help discover the missing options. These should then be applicable through the
command line.

However...

One worrying datapoint is Xilinx's own PCIe interface project for the V5 ML506
board, where the advice given is to use the implementation shell script rather
than attempting to build through the GUI; with no further explanation.

Indeed an apparently successful run through the GUI tools produces a
non-functional bitfile! I have not had time to explore deeply enough to
find out why.

- Brian