On Nov 26, 2:05 pm, jdw <jwal...@nait.ca> wrote:
> It is gratifying to observe genuine interest in the challenges of an
> unknown individual, being addressed in a meaningful way, by so many
> helpful souls! Thanks! Being a newcomer, the following commentary
> may in fact be off topic to the group so please provide me with
> feedback to that effect, if such is the case.
>
> Perhaps, in posting initially, I should have been more explicit.
> However the replies were generally right on and helpful. I plan to be
> a part of this group in the future as I attempt to learn the basics of
> VHDL. Initially it looks more than "Very Hard" DL but what I am
> finding is that part of its difficulty lies simply in becoming
> familiar with the syntax and structure. At my age that means constant
> repetitive exposure, even when full understanding is lacking, is still
> useful.
>
> Teaching at a level where our top student could be successful at
> university, but an average student would not, is a challenge. Our
> graduates are 2 year, EET (electronic engineering technologist) and so
> it is important, I believe, to have a real, interesting, breadboarding
> kind of activity associated with all major topics. We are aiming at
> having the student demonstrate some creativity rather than doing show
> and tell. For example, I am not inclined to want to teach FPGA's from
> a strictly schematic capture perspective, although having limited
> experience, I am ready to be enlightened. There are good suggestions
> in the replies I received that I will be following up on.
>
> At this moment if anyone would like to offer more very specific
> suggestions I would be most appreciative. Remember please, that I
> have no previous experience with FPGA's other than having a good
> understanding of the basics of pld's and the pal22v10 in particular.
> I might add that CUPL has been a very good tool for what we have been
> doing and I believe that our students have been able to fully
> appreciate how code turns into a fuse plot that is no different than
> the discrete design they might have implemented. Is there
> justification for keeping the limited CUPL coverage in the
> introductory course and then pushing for the creation of a second
> course which introduces VHDL? Is it justifiable to press for FPGA and
> VHDL coverage if that would have negative reprecussions on our fairly
> substantial Micro-Computer coverage using the HC11? We presently have
> no explicit coverage on micro-controllers (pics) - any comment on
> where we presently find ourselves? I already know we are sadly out of
> touch - there is a fair amount of complacency here. I am confident
> that we are doing a very good job with introductory material in
> digital but beyond that we need to update.
>
> Please make any suggestions, i.e. which tools are the best in your
> opinion, as specific and practical as possible. Thanks in advance.
>
> Jack

One area where you might find synergy is between an FPGA/VHDL course
and a microprocessor course. One of the really cool things available
in FPGAs is soft-core processors (processors built out of the LUTs and
registers in the FPGA). The ability to virtually breadboard a
processor together with "peripherals" (uart, memory, interrupt
controllers, etc.), all inside the FPGA, could be very flexible and
effective for teaching the basic elements of a microprocessor system.
Later stages in the course could delve into the design of the
processor itself (assuming you pick an open source processor core),
with projects for designing extensions to the processor (new
instructions, addressing modes, etc.) to be completed by students. I
wish we had such stuff when I was getting my BSEE degree 22+ years
ago! On the other hand, I'd have never made it to class, always
playing with an FPGA demo board if I had one then.

I would stay away from schematic capture. Coding styles can be taught
to emulate netlisting if desired (very introductory), followed my more
functional styles that require the synthesis tool to infer circuitry
from a functional descriptions(advanced). If a microprocessor course
is already taught, then your students are expected to know about
programming languages, etc. at least at an introductory level, and
VHDL can build on (or provide a foundation for) that. VHDL can also be
used to build test benches that stimulate and monitor the "unit under
test", all from a computer.

In PAL/CPLD design, you focus on sum of products representations of
functions (since that determines what will fit where in a 22v10),
whereas before those, we focused on building functions out of gates,
multiplexers, encoders, decoders, etc. With the advent of schematic
capture for FPGAs, I kind of went full circle back to the gates/muxes/
encoders/decoders for a while. Then when we started using VHDL, a more
functional/behavioral approach emerged, similar to Abel/CUPL, but
without the emphasis on SOP implementations.

I'm not generally familiar with EET degrees to know what they are
expected to master upon graduation, so some of this may be out of
scope for such a program.

Andy