On 2008-06-19, _TK_ <[email protected]> wrote:
> My problem is, that presented with a read / write API functions I have
> no idea as to what I *should* be writing to or reading from the FPGA
> and to which registers (instruction / test). My goal (at least for
> now) is to sample the state of every pin on the device.

This information is usually provided in BSDL (Boundary Scan Description
Language) files. Try to ask Quicklogic about this. (A quick search at
quicklogic.com didn't turn up anything when I tried it.)

/Andreas