On Mar 19, 9:46 am, "water9...@yahoo.com" <water9...@yahoo.com> wrote:
> 1>The Power Management Capability of PCIE can be removed? Is it option
> or necessary?
>
> My PCIE-based GbE controller reports NMI error after ifup command.
>
> Uhhuh. NMI received for unknown reason 20 on CPU 0.
> Do you have a strange power saving mode enabled?
> Dazed and confused, but trying to continue
>
> I suspect the Power Management issue?
>
> 2>How to deal with the PCIE across 4K boundry issue?
> Assumption:
>
> Max Payload size=256 bytes,DMA base addr=0xc41000,DMA Burst
> size=32bytes,packet size:64~1536 bytes,datawidth=32bit
>
> my understand:The current DMA burst cann't across the 0x1000
> address. it must break the current DMA at 0xFFC,and restart the remain
> DMA data from 0x1000.
>
> is it?
>
> 3>16bit PCIE wrapper of GTP wizard issue.
> For improving timing to 125M,i have to configure 16bit PCIE wrapper
> from GTP wizard manually for FPGA prototype.However,i am very puzzle
> that there are too many parameters to configure for the gtp_dual of
> pcie tile file. I try to replace the all gtp_dual parameters of pcie
> tile file with the other PCIE Endpointx1(clk ration:1/2;8bit wrapper)
> IP without any modify.
>
> Two questions:
>
> a> Does any parameter need to be modified for working with 16bit
> wrapper successful by referenceing the 8bit wrapper?
>
> b>In simulation environment,the return first complete data are ALL 0
> after the first Memry Read non-post request.however,all subsequences
> post/non-post transactions ,or remove the PCIE PHY mode ,or the second
> same Memry Read non-post request are ok.
>
> why cann't the first data be returned correctly?

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