Jonathan Bromley wrote:
> On Wed, 24 Oct 2007 11:29:29 -0700, Peter Alfke <[email protected]>
> wrote:
>
>
>>Jonathan, why so aggressive?
>
>
> Ooh, I can be much more aggressive than that! And it
> certainly wasn't directed at you.
>
>
>>I was just pointing out that certain applications naturally perform
>>sufficient refresh operations in their normal addressing sequence. I
>>can't see why this is "completely ridiculuous"...
>
>
> Nor is it; the absurdity comes from bending the addressing
> so that only a small part of each row is sequentially accessed,
> thereby wasting the massive increase in memory bandwidth that
> can be achieved for sequential-access applications by using
> the row buffer as a cache. My spleen was being vented at some
> designers of old computers (as alluded to by Antti, not you)
> who used video scan to access every row of DRAM on each video
> field, thereby unnecessarily burning-up memory bandwidth
> (which was in short enough supply on such machines) in order
> to save the trouble of doing refresh properly...

The bandwidth is there for the designer to use how they wish.
It also only actually matters, if that bandwidth is the
bottleneck in the total design.

eg I have done designs using interleaved video access, which removes
flicker, and makes the system appear to be dual-port.
On your yardstick, because the bandwidth is not 100% used, this
is a bad design ?

-jg