On Sep 7, 3:01 am, vasile <picli...@gmail.com> wrote:
> On Sep 7, 8:00 am, Peter Alfke <al...@sbcglobal.net> wrote:
>
> > On Sep 6, 9:03 pm, Jim Granville <no.s...@designtools.maps.co.nz>
> > wrote:> Peter Alfke wrote:
>
> > > >>>The regulator output voltage is controlled by just 2 resistors. When I
> > > >>>changed one of the resistors to lover the voltage a bit, VCCAUX did not
> > > >>>change. This leads me to believe that VCCAUX is somehow being "back"
> > > >>>powered from the Xilinx chip. These voltages are present like this before
> > > >>>the Xilinx chip has been programmed. I have not removed the regulator to
>
> > I should have expressed this better: Use the extra pull-down resistor
> > just as an experiment to see whether the problem really is reverse
> > current going into the regulator, or is something else. Just
> > temporarily, just attach the resistor lightly, by hand if possible...
> > Peter Alfke
>
> Unfortunately increasing the power dissipation with sinking/sourcing
> LDO on VCCAUX or external loads can't be the final solution. If there
> is a leackage current path from VCCIO to VCCAUX that must be founded
> and supressed somehow.
> Using series schottky between VCCAUX and FPGA will drop the output
> voltage to VCCAUX - (0.3V...0.7V) depending on load current and diode
> type.
>
> Vasile


You should make sure that no VCCAUX relative pins are hooked to VCCIO
without a resistor otherwise any fix can blow up the esd diodes. Then,
if you really need to save a couple of milliwatts, power the VCCCORE
regulator from VCCAUX, this will suck the backrush of current right
into another power supply instead of into a resistor. It is no
coincidence that 1.2v LDO regulators are designed to run on 2.5v.

Cheers
Jon Pry