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Old 09-15-2005, 06:24 AM
jtw
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Default Re: FIFO design using Virtex-II block ram..


"Mike Treseler" <[email protected]> wrote in message
news:[email protected]..
> Remco wrote:
>
>> It is just that when they give you the freebie library of components
>> why re-invent the wheel, right?

>
> Yes, the components are presented like
> jelly beans in a candy store.
> I didn't notice the handcuffs, the black box,
> and the lawyer until the sugar wore off.
>
>> Of course, their %#$%$%$^@# component doesn't work for crap, so they
>> basically steer you down a dark alley for a day or so.

>
> Even if they worked perfectly,
> I don't need the complications of their
> sim models and libraries. Running
> synthesis and simulation using the
> same code that I wrote and
> understand is a huge advantage.
>
> Many of the components are one-liners anyway.
> Even a fifo is just two counters
> and a block ram template.
>
>> We had it integrated in a DMA mechanism and when stuff doesn't work,
>> you don't immediately assume it is the commercially availbable
>> component -- one would hope they test their junk before it is thrown
>> over the wall (I guess they didn't).

>
> I don't doubt that some vendor testing is
> done, but I don't have the source and I have
> to redo it anyway in my own testbench.
>
>> So the first thing you assume is bad is your own code..

>
> If I write my own code, I don't have to assume.
> The problem is always in my own code,
> but I am free to sim/edit/trace it as
> much as I like.
>
>> I guess you get what you pay for.

>
> The only payment required is time and thought.
>
> -- Mike Treseler


I haven't looked at their FIFO app note, but in general, the app notes are
just that: notes to help you get an understanding of how to work with the
device. Their IP (Coregen or $) will be expected to be more reliable and,
presumably, application appropriate.

For an asynchronous FIFO I need, I just ran Coregen and trust that it is
doing it right. (Yes, I simulated it, and yes, I'll test it in the lab.)
For another kind, where I need lots of FIFOs of varying sizes (perhaps
dynamic), I need to create my own: and I've done it. Seems every
application, though quite similar to a previous design, has some new quirks.

JTW (Wright, not Weddick)


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