Ben Jones wrote:
> Interesting!
>
>
>>eg Why do we have HW multipliers & DSP blocks now ? - because they
>>are much faster, and lower power, than FPGA fabric solutions.
>
>
> They are also functions with a broad usefulness in a variety of
> applications.
> The "faster and lower power" argument can be applied to any piece of IP
> you care to name; just for certain functions the transition to hard silicon
> makes sense - multipliers, DSP, SERDES, Ethernet MACs, etc. I'm not
> quite convinced (yet!) that this is true of MicroBlaze/Nios (yet!).

The NiosII is relatively new ( as lifelines go ) so not for 2005, but
for 2006, or 2007 - imagine a low end Cyclone, with NIOS in the corner ?

>
>
>>>What's wrong with the PowerPC core?
>>
>>Let's see - Price, die area....
>
>
> The price premium of FPGAs with hard processor IP is artificial and it
> will be eroded in time. The efficiency of a hard microblaze/Nios in terms
> of MIPS/mm^2 will surely, surely be much worse than that of a
> processor core that was designed specifically for 90nm.

Why ?
NIOS and Microblaze are fpga resource optimised, but that is not
mutually exclusive to any process level.

Altera will have numbers already on what a simple hardcopy NIOS port
does, and probably also a good idea on what a little effort can do, were
they to make it a more tuned HW cell.

My guess is we will see this [HW FPGA.Cpu] first from Altera, as they
do not have a PPC, and already have the flows.

<snip>
>
> Was your "soft-boundary" idea intended to stay on a single die? That would
> certainly be interesting, maybe even useful in limited contexts.

Yes. Look at the ST STW22000 device, the Cell processor?, and the
Triscend devices. They all focus on the approach that "some FPGA is a
good idea". Most discussion here is ASIC _OR_ FPGA - but why not offer
both ? - start to be intelligent about what resource moves to HW/ASIC,
and what stays in the smaller/simpler FPGA corner of the die ?

The tools are probably good enough now, the flows are proven.

I think the new Xilinx Strip die/flip chip would make this
relatively easy to do, engineering wise.
The politics is another matter

-jg