Ben Jones wrote:

>> A more interesting question, is when will we see the first MicroBlaze
>>or Nios in FPGA silicon [not as a soft-cpu]?
>> They are getting close to stable enough to do this.
>
>
> True, although I don't see much value in that approach. Those architectures
> were designed with FPGA as the target technology, so mapping them
> straight to silicon might not give the best results.

They already license it for ASICs, so it's mainly a question of
when it will appear, not if.
eg Why do we have HW multipliers & DSP blocks now ? - because they
are much faster, and lower power, than FPGA fabric solutions.

> What's wrong with the PowerPC core?

Let's see - Price, die area....

>
>> Or, when we will see a soft-boundary HardCopy - where you can move
>>only PART of the total design into ASIC, and keep the rest as a smaller
>>FPGA.
>
>
> Developing and testing your design in FPGA and then hardening it just before
> putting it into mass production is rather like wearing a life-jacket in the
> harbour and then throwing it overboard as you set out to sea...

Which is why you might want move the proven stuff into HardCopy (or
whatever), and keep the smaller, fluid portion, in FPGA.

-jg