"glen herrmannsfeldt" <[email protected]> wrote in message
news:ctm8dm$vib$[email protected]..
> [email protected] wrote:
>
> > There chips with the mixture of Active HIGH and Active LOW signals. Is
> > there any pros and cons of each levels? OR it simply choice of
> > designers / manufacturers?
>
> I believe for TTL there is some advantage to active low for
> enables and such. TTL has much better current sinks than
> current sources. I don't believe the advantage is as big,
> if any, for CMOS but may have been kept for backward
> compatibility reasons.

I may be out of date but... it used to be the case that P type devices were
roughly half as fast as N type. They got the edges symetrical in CMOS logic
families by making the P channel FET twice the size of the N channel FET.