Thread: CPLD + CAN bus
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Old 11-29-2004, 03:08 PM
Aurelian Lazarut
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Default Re: CPLD + CAN bus

Hi Antti,

Antti Lukats wrote:

>"Falk Salewski" <[email protected]> wrote in message
>news:[email protected]..
>
>
>>Thanks for the reply!
>>
>>I realized four 8bit counters in the CPLD and just want to send this
>>information (4Byte) via the CAN-Bus, lets say all 100ms. Right know I am
>>
>>

>not
>
>
>>thinking wether this is the optimal solution but if it is possible without
>>an aditional uC (Project at university)
>>I will have a look if I can store enough information in the CPLD for the
>>initialization of the SJA1000 chip...
>>
>>

>
>http://ww1.microchip.com/downloads/e...Doc/21801b.pdf
>
>Quiz: How many macrocells is needed to initialize MMC card (nonSPI mode) and
>configure and FPGA from bitstream file on the card?
>
>Answer: 20 PLD macrocells!
>
>http://www.openchip.org/bootx/xmsmmc.html
>
>

No file system support (I assume) and no partition support. How do you
write the bitstream as row data ?
cheers,
Aurash

>256 PLD cells can be alot. depends how they are used
>
>but I would not go with SJA1000+PLD (unless restricted to those component by
>definition) waste of time and human resources
>
>Antti
>
>
>
>



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