Virtex-5 FPGAs and PlanAhead Deliver Maximum Performance
Learn how VirtexÃƒÂ¢Ã¢â‚¬Å¾Ã‚Â¢-5 FPGAs deliver the industry's highest performance in the shortest design time with the added bonus of consuming less power than competing solutions. With no trade offs between performance and low power, system designers can get better results in less time with Virtex-5 FPGAs when designing with ISE design tools and PlanAheadÃƒÂ¢Ã¢â‚¬Å¾Ã‚Â¢.
Webcast attendees will:
* Discover how Virtex-5 FPGAs and ISE design tools with PlanAhead can help you meet your system performance goals in less time.
o Virtex-5 product innovations deliver industry-leading performance
o ISE design tools and Virtex-5 FPGAs deliver an average 2 speed grades faster performance than available competing solutions
o PlanAhead design analysis and hierarchical design methodology delivers an additional speed grade of performance advantage
* Learn how architectural features of Virtex-5 FPGAs such as the Real 6-input LUT and diagonally symmetric interconnect structures deliver higher performance while reducing operating power, thereby eliminating the need for power/performance tradeoffs.
* See benchmarks from actual customer designs comparing the performance advantage of 65nm Virtex-5 FPGAs to existing 90nm FPGAs.
Who should attend:
* ASIC and FPGA engineers
* Designers of complex, high-performance systems
* System architects
* Engineering or technical managers
Steve Sharp, Senior Marketing Manager, Virtex Solutions
Steve has been at Xilinx since 1993 and has worked in design tool product marketing, silicon device product marketing, product solutions marketing, and currently works on corporate solutions marketing working across all Xilinx product areas. He has worked on all aspects of FPGA solutions from synthesis and design implementation tools to silicon devices, packaging, and verification.