Poll
What is your preferred platform for FPGA Design Flow ?
Windows
54%
Linux
37%
Solaris
1%
Mixed
3%
Other
1%
No preference
4%
Total votes: 3278
Practical steps for FPGA system debug, validation, and serial link tuning
Webcast Vendor:
Xilinx
Webcast Registration:
Click here to Register This webcast will focus on the latest industry advances, and highlight how to take advantage of the higher FPGA fabric and I/O speeds to create more powerful measurement cores. In addition, you will see how to quickly debug and validate with automated FPGA focused logic analyzer measurements. Finally, for those designing high-speed serial links, steps will be outlined on how to use a new tool to automate link "tuning" through transmitter pre-emphasis and receiver equalization optimization.








