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ESC - Embedded System Conference - Silicon Valley, CA
Apr 26 2010 8:00 amApr 29 2010 6:00 pmWhere:The San Jose McEnery Convention Center, San Jose, CAESC is the fastest-growing embedded event in the world, with events happening year-round in locations as Silicon Valley, Boston, India, the UK and France.
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Practical steps for FPGA system debug, validation, and serial link tuning
This webcast will focus on the latest industry advances, and highlight how to take advantage of the higher FPGA fabric and I/O speeds to create more powerful measurement cores. In addition, you will see how to quickly debug and validate with automated FPGA focused logic analyzer measurements. Finally, for those designing high-speed serial links, steps will be outlined on how to use a new tool to automate link "tuning" through transmitter pre-emphasis and receiver equalization optimization.
Upcoming FPGA Events
- Xilinx DSP Design Platforms: Achieving 1000 GMACs of DSP performance with Xilinx FPGAs(Webcast)(1 day)
- FPGA Virtual Summit(Webcast)(3 days)
- Accelerating Custom IC Layout with IC Station - San Jose, CA(Event or Conferences)(8 days)
- RocketLaunch webinar(Webcast)(10 days)
- How Physical Implementation realizes Power Intent Web Seminar(Webcast)(15 days)
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