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Analysis and Optimization of an FPGA Serial Link
July 19, 2007 - 1:45pm — fc
Webcast Vendor:
XilinxWebcast Registration:
http://seminar2.techonline.com/s/xilinx_...This web seminar will describe design techniques to overcome challenges of a high-speed serial interface. This includes an effective approach to analyze and debug a multi-gigabit serial link with Xilinx ChipScope Pro Serial IO Toolkit to achieve a working design.
Webcast attendees will learn:
* Factors that affect the Bit Error Rate of a serial link
* Bit Error Ratio Testing (BERT) & minimizing BER
* Innovative FPGA & Software technologies for effective link analysis
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