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Signal and Power Integrity Design Techniques for SSN
With today’s stringent requirements for high-speed memory and serial interfaces, designers are looking for the best techniques for dealing with simultaneous switching noise (SSN). Meeting performance goals for near- and far-end SSN, as well as power supply quality, are key to a design’s success.
This webcast teaches signal integrity design techniques to mitigate SSN, including how to maintain power integrity. You’ll learn about measurement criteria, measured results, and data on design prototypes and simulation predictions.
At the net seminar, you’ll learn how to:
Identify SSN mechanisms
Quantify SSN as a percentage of signal swing
Improve SSN on your system
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