TurboConcept specializes in turbo code Forward Error Correction solutions. TurboConcept offers the first turbo code IP core compliant with the DVB open standard Return channel via Satellite (ETSI EN 301 790) : TC1000 IP core. It implements the second generation of turbo codes, eliminating the classical "flattening" effect. TC1000 has been optimised for Xilinx Virtex family. The IP core has been tested and validated in several third-party environments and an ASIC version has been specifically developed for a space on-board application. TurboConcept offers complementary services: support for system integration, design customisation and ASIC migration. VHDL source code is also available.
Turbo code Forward Error Correction solutions