Cadplex develops EDA / CAD productivity tools for FPGA and PCB design.
The tools plug into existing PCB Design flows from Cadence and Mentor as well as others. The tools are useful for System, FPGA and Circuit Engineers as well as PCB Designers.
CadPlex products dramatically decrease the time to market for new product introductions by addressing key bottlenecks within existing EDA design flows. Using Symbol Modeler, schematic symbols can be automatically generated with advanced PDF Data Sheet extraction. Symbol Modeler imports spread sheet files directly from the packaging files for the Xilinx and Altera families of FPGA's. In addition, schematic symbols can be generated directly from tables extracted from Excel spread sheet models, existing EDA symbols, or from engineering models including IBIS