Product Category: 
Development Boards & Kits

Virtex-4 XC4VSX35-FF668-10C, 64 MB DDR SDRAM, 8Mb ZBT SRAM, 64 Mb Flash, 4 kb IIC EEPROM

Product Description: 

Powered by the Virtex-4 SX35 device and supported by industry-standard peripherals, connectors and interfaces, the Virtex-4 ML402 SX Evaluation Platform provides a rich feature set that spans a wide range of applications. Designed for use with the Xilinx System Generator for DSP development platform, the Virtex-4 ML402 SX Evaluation Platform provides a great entry-level environment for developing signal processing designs.
For US version: HW-V4-ML402-USA
For UK version: HW-V4-ML402-UK
For other European versions: HW-V4-ML402-EC
Optional Accessories: HW-V4-ML40x-ACC

Buy Online or from your local Distributor

The ideal platform to evaluate and implement your DSP based FPGA design!

Xilinx On Board Information

ISE Design Tools Center

Xilinx IP Center

Xilinx Education Services

Virtex-4 FPGAs

System Generator for DSP

ChipScope Pro

Board Accessory Kit

ML402 Documentation

ML402 Demos and Reference Designs

Device Family Support

Virtex-4 SX

Key Features

Xilinx Device: XC4VSX35-FF668-10C

Clocks: 100 MHz Oscillator, 2 Clock Sockets

Memory: 64 MB DDR SDRAM, 8Mb ZBT SRAM, 64 Mb Flash, 4 kb IIC EEPROM

Connectors and Interfaces: 4 SMA Connectors (Differential Clocks), 2 PS/2 Connectors (Keyboard/Mouse), 2 Audio (In/Out, Microphone/Head Phone), RS-232 Serial Port, 3 USB Ports (2 Peripheral/1 Host), PC4 JTAG, DB 15 VGA Display, 10/100/1000 RJ-45 Ethernet Port, 64 Bit User Expansion Connector, General Purpose I/O: Buttons, LEDs, and DIP Switches

Display: 16 x2 Character LCD

Targeted Application

Markets: Industrial, Telecom/Datacom, Medical, Military/Aerospace and Consumer

Applications: Digital Video, DSP, Image Processing, Digital Communications

This Product Includes:

Platform including power supply (localized to US, UK or EC), 32-MB Compact Flash Card and built in demonstrations

Development tools and PC download cable are not included and must be ordered separately

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