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1 x XC2V3000 + 2 x 12 bit ADC @ 105 MS
Two identical receiver channels include A/D, digital downconverter and a shared FPGA
Two low distortion 105 MHz 12-bit A/D converters
Wideband digital receivers with decimation range from 2 to 64
Output bandwidths to 40 MHz for 100 MHz sampling clock
Advanced Virtex-II FPGA for signal preprocessing
Factory-installed cores available
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