2 x XCV600E + 4 x 14 bit ADC @ 80 MSPS
Four 65 or 80 MHz, 14-bit A/D converters
Front panel FPGA I/O connector
All receivers can select any of the four inputs
90 MHz input bandwidth
3.2 kHz to 1.6 MHz output bandwidths for fs = 64 MHz
Front panel clock and sync bus to sync multiple boards