World's 1st FPGA Portal

• Xilinx FPGA BASED I/O card
• 72 I/O BITS
• 5V tolerant I/O
• 24 mA output drive
• PCI interface
• Many I/O functions supplied
• 11 LED status indicators
• Source supplied for all functions
• FPGA downloaded from host
• Low power consumption
• Made in USA - local support
• 2 year warranty
The MESA 5I20 is a general purpose VHDL source is provided for all examples
programmable I/O card for the PCI bus. The 5I20 and custom I/O functions can be provided on a
uses a 200K gate Xilinx FPGA for all logic, so it contract basis.
is truly an “Anything I/O” card.
The FPGA configuration is downloadable 24 mA. Pullup resistors are provided for all pins
from the PCI bus side, allowing creation of so that they may be connected directly to optoalmost
any kind of specialized I/O function, even isolators, contacts etc.
including micro-controllers in the FPGA.
A PCI bridge chip is used for FPGA with I/O module rack compatible pinouts and
interfacing, so that the FPGA designs need only interleaved grounds.
interface to a simple 32 bit synchronous local
bus. general purpose LEDs are available for circuit
Several pre-made functions are provided,
including a 72 bit parallel I/O card with 32 bit A 50 MHz crystal oscillator is provided as
host interface, a 12 channel host based servo the FPGA system clock. The 33 MHz PCI clock
motor controller, a 4 or 8 channel micro- is also avaialbe to the FPGA. Higher or lower
controller based servo motor controller (micro- frequencies can be generated by the DLL built
controller CPU built into FPGA), and a 8 into the FPGA.
channel, 32 bit timer counter card capable of
running at 100 MHz.
All I/O bits are 5V tolerant and can sink
the 5I20 uses three 50 pin connectors
3 FPGA configuration status LEDS plus 8
debugging or circuit status information.