World's 1st FPGA/CPLD Portal

ETH_USB_1x1 contains 100 Mb Ethernet and USB 2.0 communication, as well as FLASH and SDRAM memory. A Virtex-II Pro device with a built-in PowerPC processor handles these devices. The Virtex-II Pro is connected to the HAPS motherboard with 119 signals, which allows fast communication with the emulated design.
The ETH_USB_1x1 board allows debugging and control of a HAPS system via an Ethernet or USB 2.0 connection. In addition, it enables a PC or workstation to retrieve debug information from the design and also to download input data, RAM contents etc. It even allows engineers to reconfigure the complete HAPS system by sending commands and bit files over the Ethernet or USB connection.
Designers can use the default Virtex-II Pro configuration, or reconfigure the FPGA to streamline the interface to a particular application.

The 50x140 mm module can also be used as a stand-alone development board.
Form factor: 1x1 (5x7 cm, occupies one daughter board connector).
USB, Ethernet and 0.1" header for RS-232 ribbon cable are placed on an "extended" piece of the board that protrudes outside the 1x1 module space. This part of the board can be cut off and mounted in a panel.
Runs on a HAPS system with any VCCO
FPGA device: Virtex-II Pro XC2VP7 in FG456 package
FPGA clock sources:
local oscillators of 24, 25 and 96 MHz
clock from HAPS connector
100/10Mb autosensing Ethernet interface with RJ-45 connector
USB 2.0
HAPS connector directly connected to FPGA
4M FLASH and 32M SDRAM
The sample FPGA configuration delivered with the board contains a basic interface to the USB device