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USB Function Controller

IP Vendor: 
CAST, Inc.
IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
Bus Interface and IO
IP Supported FPGA Device: 
Cyclone
IP Description: 

Features

Verilog implementation on register transfer level (RTL)
Original RTL version of core support for both full speed (12 Mbps) and low speed (1.5 Mbps)
Core will perform all USB enumeration in hardware
All interfaces are architected as FIFO-based models
Cyclical redundancy check (CRC) generation and checking
Physical layer interface
AvalonTM interconnect compliant
Netlist configuration (3 endpoints)
Control Endpoint
Bulk IN Endpoint
Bulk OUT Endpoint
Original RTL version of core is configurable for up to 15 additional IN or OUT endpoints with configurable endpoint direction and FIFO buffer for each endpoint
Optimized for use with Altera® Nios® embedded processor
Description
The SLSUSBFSFCV1 USB Function Controller from System Level Solutions is an implementation of the USB core as a netlist for Altera devices. The SLSUSBFSFCV1 core provides a USB function controller that is designed to comply with the USB1.1 specification for full speed (12 Mbps) functions. The core configuration used to generate this netlist has three endpoints

- Control Endpoint

- Bulk IN Endpoint

- Bulk OUT Endpoint

The original RTL version of the core is user configurable for up to 15 IN endpoints and for up to 15 OUT endpoints in addition to Endpoint 0. These additional endpoints can be individually configurable for bulk/interrupt or isochronous transfers. Each endpoint requires a FIFO buffer to be associated with it."

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