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SONET/SDH Deframer

IP Vendor: 
Aliathon
IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
Communication and Networking
IP Supported FPGA Device: 
Cyclone
Stratix
Stratix II
IP Description: 

"Features
Supports all SONET equivalents of SDH functionality
Detects SDH frames for STM-0/1/4
May be dynamically switched between rates
Generates LOS, OOF, and LOF alarms
Descrambles the SDH frames
Extracts regenerator section overhead and detects B1 errors
Extracts multiplex section overhead and detects B2 errors
Processes all AU pointers (up to 12 for VC3 over STM4)
Extracts VC3, VC4, and VC4-4c, channelized and single-channel
All combinations of VCs are supported
VC settings may be dynamically reconfigured on a per VC basis
Detects B3 errors for all VCs
Extracts higher order path overhead

Description
The Aliathon STM-0/1/4 (STS-1/3/12) Deframer core provides a flexible, resource-efficient, programmable logic based solution for SONET/SDH interfaces. It supports both concatenated payloads (e.g., VC4-4c over STM-4) and channelized (e.g., multiple VC3s over STM-1). The core supports all of the specified rates and may be dynamically switched to any of those rates. The core is supported for Stratix® II, Stratix GX, and Cyclone™ FPGAs."

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