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What is your preferred platform for FPGA Design Flow ?:

Smart Card Reader

IP Vendor: 
CAST, Inc.
IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
Bus Interface and IO
IP Supported FPGA Device: 
Cyclone
Stratix II
IP Description: 

"Implements an interface and controller for communicating between smart cards and host systems using the AMBA Advanced Peripheral Bus (APB).
The SCR-APB supports the ISO/IEC 7816-3:1997(E) and EMV'96 3.1.1 specifications, which define the electrical signals and transmission protocols for smart cards (also known as integrated circuit cards). It acts as a communication controller, passing data to and from the host system and the smart card. It is fully-featured, and can activate and deactivate cards, perform cold/warm resets, handle ATR response reception, and execute other essential functions.
The SCR-APB consists of the megafunction smart card reader logic with a wrapper for the APB. (Support for other bus interfaces is available.)
The megafunction is fully synchronous for easier testing and is designed for efficient ASIC or FPGA implementation. For an Altera Cyclone, for example, it requires just 925 LEs, 54 IOs, and operates at 102 MHz.
Applications
Smart cards embed a computer chip in a credit-card sized plastic card, and are gaining global popularity for a variety of applications, including:
• personal identification
• mobile phone personalization
• credit/debit functions"

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