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PT4 Multi-standard Video Decoder

PT4 Block Diagram
IP Vendor: 
SingMai Electronics
IP Target Vendor: 
Altera
IP Code Language: 
Verilog
IP Type: 
Design
IP Category: 
Audio, Video and Image Processing
IP Supported FPGA Device: 
Cyclone
Cyclone II
Cyclone III
Spartan-3
Spartan-3A
Spartan-3A DSP
Spartan-3AN
Spartan-3E
Spartan-II
Spartan-IIE
Spartan/XL
Stratix
Stratix GX
Stratix II
Stratix II GX
Stratix III
Virtex
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-5 FXT
Virtex-5 LX
Virtex-5 LXT
Virtex-5 SXT
Virtex-E
Virtex-E EM
Virtex-II
Virtex-II Pro
IP Description: 

PT4 is a high quality, adaptive 2D/3D comb, multistandard video decoder available as an area efficient IP core for Altera FPGAs. Despite the small area the decoder occupies it offers a near broadcast quality and is free from the artifacts shown by other off the shelf decoders.

* PAL-B/D/G/I/M/N, NTSC-M/J decoding, (SECAM soon).
* 2D 3/5 line comb and asymmetric minimum delay 3D field/frame combs.
* Pixel rate adaptive switching between 'simple notch', line comb, field comb and frame comb.
* 12 bit internal data paths, 10 bit I/O.
* BT656 compatible output.
* Minimum delay mode comb needs no compensating audio delay is required.
* 2-D only comb mode uses internal memory.

The decoder accepts 10-bit composite line locked video sampled at 27MHz together with synchronising signals and clock, (for example from the Analog Devices AD9981 ADC). The decoder is a complementary design.

The colour burst from the input video is used to phase lock the subcarrier oscillator which then addresses a sine and cosine LUT. These waveforms are used to demodulate the colour component of the composite waveform. The resulting U and V colour components are then low pass filtered and applied to a 3 line comb, 263/312 line field comb and 525/625 line frame comb filter.

The chrominance comb adapts between all the available comb modes on a pixel by pixel basis based on the chrominance and luminance amplitude differences across the comb aperture. The resulting combed U and V components provide the colour component outputs where they are amplified and scaled before being formatted to a 10-bit BT656 output. The combed U and V are also remodulated onto the colour subcarrier and subtracted from the composite to produced a combed luminance output which is also scaled and formatted into the BT656 stream.

Control and status registers are written to and read from using a conventional 8 bit wide microprocessor interface.

Comments

jamalel640
December 3, 2010 - 11:24pm

fpga

no


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