Poll

What is your preferred platform for FPGA Design Flow ?:

PT20

IP Vendor: 
SingMai Electronics
IP Code Language: 
Verilog
IP Type: 
Design
IP Category: 
Audio, Video and Image Processing
IP Description: 

PT20 is a 'simple SDRAM' controller. specifically designed to provide field and frame delays for the PT5 and PT12 video decoder and video noise reducer, but also applicable for other FIFO delay requirements at up to 27MHz data rates.

PT20 provides one write port and 2 read ports, typically to simultaneously provide one field and one frame delay. Specifically tested with the Micron MT48LC16M16 SDRAM (datasheet is available below) it may also be used with other devices from the same family or similar devices from other manufacturers.

It has been designed to use as little resource as possible and requires no additional buffer memory. SDRAM operation is at 108MHz and there are no 'zero clock' in/out buffer transitions to ease interfacing to the memory.

PT20 is a 'simple' SDRAM controller for video delay applications

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