What is your preferred platform for FPGA Design Flow ?:


IP Vendor: 
IP Target Vendor: 
IP Type: 
IP Category: 
Communication and Networking
IP Description: 

"The Serial Gigabit Media Independent Interface (SGMII) is a connection bus for Ethernet Media Access Controllers (MACs) and Physical Layer Devices (PHYs) defined by Cisco Systems. It replaces the classic 22-wire GMII connection with a low pin count, 4-pair, differential SGMII connection. The classic GMII interface defined in the IEEE802.3 specification is strictly for Gigabit rate operation. However, the Cisco SGMII specification defines a method for operating 10 Mbps and 100 Mbps MACs over the interface. Moreover, the Cisco SGMII specification is comprised of more than just a bus interface definition; it defines a bridging function between SGMII and GMII buses.

The Lattice SGMII PCS IP core implements the PCS functions of the Cisco SGMII specification. Users may use this IP core in their own SGMII-to-GMII bridging applications. The entire SGMII bridging function can be implemented in Lattice Field Programmable Gate Array (FPGA) devices."

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