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What is your preferred platform for FPGA Design Flow ?
Windows
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Linux
36%
Solaris
1%
Mixed
2%
Other
1%
No preference
4%
Total votes: 4808

Serial RapidIO x1 and x4 Endpoint Cores

IP Target Vendor: 
Lattice
IP Type: 
Design
IP Category: 
Bus Interface and IO
IP Description: 

"Features
1.2 GHz, 2.5 GHz, and 3.125 GHz serial specification support
Endpoint and switch application support
x1 and x4 serial interface support
Error management extensions
34-bit addressing
Legal data payload sizes up to 256 bytes
All transaction flows and priorities
Input/output and message-passing protocols
Advanced buffer management scheme
Receiver-controlled and transmitter-based flow control
Multicast event support
Compliant with RapidIO specification, revision 1.2"

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