Poll

What is your preferred platform for FPGA Design Flow ?:

Interlaken

IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
FPGA Features and Design
IP Supported FPGA Device: 
Stratix II GX
Virtex-5 FXT
Virtex-5 LXT
IP Description: 

Interlaken is a scalable chip-to-chip interconnect protocol designed to enable transmission speeds from 10Gbps to 100Gpbs and beyond. Interlaken takes the best of existing protocols and builds a channelized protocol that operates over the currently available serial link technologies.

The channelized protocol is flexible enough to allow system designers to optimally designate different functions between multiple devices. For example, in a typical router, one device can be used to perform aggregation and classification before passing the packets to a second device that performs traffic management. With the channelized protocol of Interlaken, the classification information is easily transmitted to the traffic manager without much (if any) overhead.

Using a serial interface dramatically lowers the pin requirement for the chip-to-chip interface. Compared to the SPI4.2 protocol, Interlaken requires 90% less pins. In addition, the Interlaken protocol can be implemented using as many number of serial links as required to achieve the desired bandwidth. This scalable approach allows a simple and straight forward migration path for system designers to implement higher performance systems: there is no need to change the chip-to-chip interconnect technology ever ! Simply scale the current Interlaken implementation by adding more serial links, and get more bandwidth.

Interlaken also improves the data integrity of the transmission link relative to other protocols. A 67/64 bit encoding scheme along with a self-synchronizing scrambler is used to maintain proper DC balance. Payload data integrity is monitored using a CRC24 mechanism and each serial link's integrity can be monitored using a CRC32 algorithm.

Sarance Technologies offers Intellectual Property (IP) cores implementing different configurations of Interlaken targeted at any ASIC process technology, Xilinx Virtex™-5, and Altera® Stratix® II GX FPGA devices.

* Altera® FPGA Interlaken IP Cores

* Xilinx FPGA Interlaken IP Cores

* ASIC Interlaken IP Cores

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