Poll

What is your preferred platform for FPGA Design Flow ?:

Reed Solomon Decoder

IP Vendor: 
Avnet
IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Communication and Networking
IP Supported FPGA Device: 
Spartan-IIE
Virtex
Virtex-E
Virtex-II
IP Description: 

"The Memec Design MC-XIL-RSDEC family of Reed-Solomon Decoder solutions perform forward error correction using block coding. Block coding consists of calculating a number of parity symbols over a number of message symbols when they append to the end of the message symbols, forming a codeword. This core has applications in data communications channels, DTV/HDTV broadcast, data storage systems, and satellite communications.

Device Family Support

Virtex-II

Virtex-E

Virtex

Spartan-IIE

Spartan

Key Features

Customizable

>580 Mbps throughput"

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