Reed-Solomon Compiler, Decoder

"Features
High-performance encoder/decoder for error detection and correction
Fully parameterized Reed-Solomon function, including:
Number of bits per symbol
Number of symbols per codeword
Number of check symbols per codeword
Field polynomial
First root of generator polynomial
Space between roots in generator polynomial
Decoder features:
Variable option
Erasures-supporting option
Encoder features variable architectures
Support for shortened codewords
Conforms to Consultative Committee for Space Data Systems (CCSDS) Recommendations for Telemetry Channel Coding, May 1999
Easy-to-use IP Toolbench interface:
Generates parameterized encoder or decoder
Generates customized testbench and customized Tcl script
DSP Builder ready
IP functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators
Support for Stratix® III, Stratix II, Stratix II GX, Stratix GX, Stratix, Cyclone III, Cyclone II, Cyclone, HardCopy® II, and HardCopy Stratix device families
Preliminary support for Stratix III devices
General Description
The RS Compiler offers a fully parameterizable RS encoder and RS decoder. RS codes are widely used for error detection and correction in a wide range of DSP applications for storage, retrieval, and transmission of data. The RS Compiler has the following options:

Erasures-supporting option—the RS decoder can correct symbol errors up to the number of check symbols, if you give the location of the errors to the decoder
Variable encoding or decoding—you can vary the total number of symbols per codeword and the number of check symbols, in real time, from their minimum allowable values up to their selected values, when you are encoding or decoding
Error symbol output—the RS decoder finds the error values and location and adds these values in the Galois field to the input value
Bit error output—either split count or full count"